1. Field of the Invention
The present invention generally relates to liquid crystal displays with low cost and well display quality.
2. Description of the Prior Art
Liquid crystal displays typically have a circuit constructed by data lines and gate lines, which are orthogonal to each other. In addition, a data driver drives the data lines, and a scan driver (or gate driver) drives the gate lines. Because higher resolution is needed, the number of data lines and hence the number of the data drivers must be increased, resulting higher cost.
One method to lower the cost is to decrease the number of the data lines. Prior art provides a “dual gate circuit” for this purpose. FIG. 1 shows a conventional liquid crystal display with a dual gate circuit. As shown in FIG. 1, in each row of pixel electrodes, such as the row of pixel electrodes P1, P2, P3 . . . P6, each two adjacent pixel electrodes connect to the same data line. For example, the pixel electrodes P1 and P2 connect to data line s1, pixel electrodes P3 and P4 connect to data line s2, and so on. In addition, each two adjacent pixel electrodes connect to different gate lines. For example, the pixel electrode P1 connects to gate line g1, while the pixel electrode P2 adjacent to P1 connects to gate lines g2.
The circuit shown in FIG. 1 can decrease the number of data lines; however, it may decay the display quality. When a scan voltage is inputted to the gate line g1, the thin-film transistors SW1, SW3, and SW5 are opened, and the date lines s1, s2, s3 respectively input a pixel voltage to the pixel electrode P1, P3, and P5 via the thin-film transistors SW1, SW3, and SW5. After that, a low voltage is inputted to the gate line g1, the scan voltage is inputted to the gate line g2 to open the thin-film transistors SW2, SW4, and SW6, and the date lines s1, s2, s3 respectively input the pixel voltage to the pixel electrode P2, P4, and P6 via the thin-film transistors SW2, SW4, and SW6. In this time, electrical potentials remain in the pixel electrodes P1, P3, and P5; hence, the remained electrical potential in pixel electrode P2 disturbs the potential of the pixel electrode P3, the remained electrical potential in pixel electrode P4 disturbs the potential of the pixel electrode P5, and the potential of the pixel electrodes P3 and P5 will be coupled, resulting vertical mura.
Therefore, it would be beneficial to provide novel liquid crystal displays with low cost and excellent display quality as well.